LMT028DHHFWL-NEA

LCD Module User Manual

Prepared by:

Checked by:

Approved by:

Wangxikuan

Date: 2019-05-09

Date:

Date:

Rev. Descriptions

Release Date

0.1

Preliminary new release

2019-05-09

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LMT028DHHFWL-NEA

Table of Content

1. Basic Specifications .............................................................................................................. 3

1.1 Block Diagram ................................................................................................................................................................. 3

1.2 Terminal Functions .......................................................................................................................................................... 3

1.2 Terminal Functions .......................................................................................................................................................... 4

2. Absolute Maximum Ratings .................................................................................................. 6

3. Electrical Characteristics ...................................................................................................... 6

3.1 DC Characteristics .......................................................................................................................................................... 6

3.2 AC Characteristics .......................................................................................................................................................... 7

3.3 XPT2046 control Timing .................................................................................................................................................. 8

3.4 Backlight control Timing ................................................................................................................................................. 9

3.5 Reset Timing .................................................................................................................................................................. 9

4. Functions ............................................................................................................................. 10

4.1 Display Commands ....................................................................................................................................................... 10

4.2 Power off the LCD Module ............................................................................................................................................ 15

4.3 Refreshing The LCD Module ......................................................................................................................................... 15

5. Optical Characteristics ........................................................................................................ 15

6. Design and Handling Precaution ........................................................................................ 17

7. Touch panel Design Precautions ........................................................................................ 17

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1. Basic Specifications

Screen Size(Diagonal) :

2.8”

Color Depth:

65k colors

Number of dots :

320 x 240(RGB)

Active Area :

57.6x43.2 mm

Dot Pitch :

0.18x0.18 mm

Display Technology :

a-Si TFT active matrix

Display Mode :

Transmissive / Positive

Pixel Configuration :

RGB Stripe

Viewing Direction :

3H (*1) (gray scale inverse)

9H (*2)

Polarizer Surface Treatment:

Glare

Backlight Type:

LEDs

Outline Dimension :

79.3 x 49.1 x 8.0(Max) mm (see dwg for details)

Operating Temperature :

-20 ~ +70°C

Storage Temperature :

-30 ~ +80°C

Note:

*1. For saturated color display content (eg. pure-red, pure-green, pure-blue, or pure-colors-combinations).

*2. For “color scales” display content.

*3. Color tone may slightly change by Temperature and Driving Condition.

1.1 Block Diagram

/IRQ,CSTP,DIN,DOUT,DCLK

Touch Circuit

BLEN

Backlight Circuit

TFT Panel

320 × 240(RGB)

VDD

VSS

/RD, /WR, D0~D7

ST7789VI or equivalent

/CS, /RES,D/C,FMARK

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1.2 Terminal Functions

Pin No.

(K1)

Pin Name

I/O Descriptions

1

VSS

2

VSS

P

Negative power supply,0V

Backlight control

3

BLEN

I

Program dimming levels by driving pin with digital

pulses.

4

VDD

5

VDD

P

Positive power supply

6

/RD

I

Read enable input, active low

7

/WR

I

Write enable input, active low

Register Select

8

D/C

I

D/C=H, Transferring the Display Data

D/C = L, Transferring the Control Data

Chip Select

9

/CS

I

/CS=L, enable access to the LCD module

/CS=H, disable access to the LCD module

10

D0

I/O Data Input

:

:

:

:

17

D7

I/O Data Input

Reset signal

18

/RES

I

/RES = L, Initialization is executed

/RES = H, Normal running.

19

FMARK

O

Displaying Timing Frame Signal

20

NC

-

No Connection

21

VSS

P

Negative power supply,0V

Pen Interrupt.

22

/IRQ

O

Open anode output (requires 10k Ω to 100k Ω pull-up

resistor externally).

Chip Select Input.

23

CSTP

O

Controls conversion timing and enables the serial

input/output register.

24

DIN

I

Serial Data Input.

If CS is LOW, data is latched on rising edge of DCLK.

Serial Data Output.

25

DOUT

O

Data is shifted on the falling edge of DCLK. This output

is high impedance when CS is HIGH.

External Clock Input.

26

DCLK

O

This clock runs the SAR conversion process and

synchronizes serial data I/O.

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Pin No.

(K2)

Pin Name

I/O Descriptions

1

VSS

P

Negative power supply,0V

Pen Interrupt.

2

/IRQ

O

Open anode output (requires 10k Ω to 100k Ω pull-up

resistor externally).

Chip Select Input.

3

CSTP

O

Controls conversion timing and enables the serial

input/output register.

4

DIN

I

Serial Data Input.

If CS is LOW, data is latched on rising edge of DCLK.

Serial Data Output.

5

DOUT

O

Data is shifted on the falling edge of DCLK. This output

is high impedance when CS is HIGH.

External Clock Input.

6

DCLK

O

This clock runs the SAR conversion process and

synchronizes serial data I/O.

7

VSS

8

VSS

P

Negative power supply,0V

Backlight control

9

BLEN

I

Program dimming levels by driving pin with digital

pulses.

10

VDD

11

VDD

P

Positive power supply

12

/RD

I

Read enable input, active low

13

/WR

I

Write enable input, active low

Register Select

14

D/C

I

D/C=H, Transferring the Display Data

D/C = L, Transferring the Control Data

Chip Select

15

/CS

I

/CS=L, enable access to the LCD module

/CS=H, disable access to the LCD module

16

D0

I/O Data Input

:

:

:

:

23

D7

I/O Data Input

Reset signal

24

/RES

I

/RES = L, Initialization is executed

/RES = H, Normal running.

25

FMARK

O

Displaying Timing Frame Signal

26

NC

-

No Connection

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2. Absolute Maximum Ratings

VDD =5V, VSS=0V, T OP =25  C

Items

Symbol

Min.

Max.

Unit Condition

Supply Voltage

VDD

-0.3

+5.5

V

VSS= 0V

Input Voltage

V IN

-0.3

+4.6

V

VSS = 0V

Operating Temperature

T OP

-20

+70

 C

No Condensation

Storage Temperature

T ST

-30

+80

 C

No Condensation

Cautions:

Any Stresses exceeding the Absolute Maximum Ratings may cause substantial damage to the device. Functional

operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure

to extreme conditions may affect device reliability.

3. Electrical Characteristics

3.1 DC Characteristics

VDD=5V, VSS=0V, T OP =25  C

Items

Symbo

MIN.

TYP.

MAX.

Unit Condition /

l

Application Pin

Operating Voltage

VDD

4.8

5.0

5.2

V

VDD

IOVDD

2.7

3.0

3.6

V

IOVDD

Input High Voltage

V IH

0.7* IOVDD

-

IOVDD

V

/RES,D0~D7,/CS,/RD,/

WR,BLEN,D/C,

Input Low Voltage

V IL

0

-

0.3* IOVDD

V

/IRQ,CSTP,DIN,DOUT,D

CLK

D0~D7,

Output High Voltage

V OH

0.7* IOVDD

-

IOVDD

V

/IRQ,CSTP,DIN,DOUT,

DCLK

0

-

0.3* IOVDD

V

D0~D7

Output Low Voltage

V OL

/IRQ,CSTP,DIN,DOUT,

0

-

0.4* IOVDD

V

DCLK

Operating Current

I DD

-

74.5

86

mA Backlight are ON

I DD

-

6.25

16

mA Backlight are OFF

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3.2 AC Characteristics

8080 Mode System Bus Timing

VDD =5V, VSS=0V, T OP =25  C

Signal

Symbo

Spec.

l

Parameter

Min.

Max.

Unit

Description

Address setup time

5

-

D/C

T AST

ns

-

T AHT

Address hole time(Write/Read)

13

-

T CHW

Chip select “H” pulse width

5

-

T CS

Chip select setup time(Write)

20

-

Chip select setup time(Read ID)

60

-

/CS

T RCS

ns

-

T RCSFM Chip select setup time(Read FM)

460

T CSF

Chip select wait time(Write/Read)

13

T CSH

Chip select hold time

13

T WC

Write cycle

86

-

/WR

T WRH Control pulse “H” duration

20

-

ns

-

T WRL Control pulse “L” duration

20

-

T DST

Data setup time

13

-

For maximum

T DHT

Data hold time

13

-

CL=30pF

DB[7:0]

T RAT

Read access time(ID)

-

52

ns

For minimum

CL=8pF

T RATFM Read access time(FM)

-

442

T ODH

Ouput disable time

14

104

T RC

Read cycle(ID)

208

/RD(ID)

T RDH

Control pulse “H” duration(ID)

120

When read ID data

T RDL

Control pulse “H” duration(ID)

60

ns

T RCFM Read cycle(FM)

585

/RD(FM)

When read from

T RDHFM Control pulse “H” duration(FM)

120

frame memory

T RDLFM Control pulse “H” duration(FM)

460

Note:

*1. Input signal rise/fall time should be less than 15ns .

*2. All timing is using 20% and 80% of VDD as the reference.

*3. Please refer to ST7789VI datasheet for details

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3.3 Touch Panel controller Timing Characteristics

VDD=5V, VSS=0V, T OP =25  C

Item

Symbol MIN.

TYP.

MAX.

Unit

Acquisition time(*1)

t ACQ

1.5

-

-

us

DIN Valid Prior to DCLK Rising

t DS

100

-

-

ns

DIN Hold After DCLK HIGH

t DH

50

-

-

ns

DCLK Falling to DOUT Valid

t DO

-

-

200

ns

CSTP Falling to DOUT Enabled

t DV

-

-

200

ns

CSTP Rising to DOUT Disabled

t TR

-

-

200

ns

CSTP Falling to First DCLK Rising

t CSS

100

-

-

ns

CSTP Rising to DCLK Ignored

t CSH

10

-

-

ns

DCLK high pulse width

t CH

200

-

-

ns

DCLK low pulse width

t CL

200

-

-

ns

DCLK Falling to BUSY Rising

t BD

-

-

200

ns

CSTP Falling to BUSY Enabled

t BDV

-

-

200

ns

CSTP Rising to BUSY Disabled

t BTR

-

-

200

ns

NOTE:

*1 See Serial Data Sequence Diagram.

*2 The BUSY signal is not connected to Terminal (K3,K4),after one control byte send via DIN,

some delay is needed to read the conversation result through DOUT.

*3 Please see the XPT2046 datasheet for details.

Timing diagram

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3.4 Backlight control Timing

VDD=5V, VSS=0V, T OP =25  C

Signal

Symbol

Parameter

Spec.

Min. Typ Max.

Unit Description

t HI

Time Delay between Steps

2

-

-

us H: 3.3V

BLEN

t LO

CTRL LOW Time for Dimming

1

-

250

us L: 0V

t SD

CTRL LOW ,shutdown Pulse Whidth

2

-

-

ms

Note: For basic ON/OFF function, please beware of minimum pulse width.

Register BLEN timing

3.5 Reset Timing

VDD =5V, VSS=0V, T OP =25  C

Item

Symbol

MIN.

TYP.

MAX.

Unit

Reset LOW pulse width

t RW

10

-

-

us

Reset time

T RT

-

-

170

ms

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4. Functions

4.1 Display Commands

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Notes:

1. There will be no abnormal visible effects on the display when S/W or H/W Reset are applied.

2.

Please refer to ST7789VI datasheet for details

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4.2 Power off the LCD Module

It recommends that enter Sleep Mode before power off the LCD module.

4.3 Refreshing The LCD Module

It recommends that the operating modes and display contents be refreshed periodically to prevent

the effect of unexpected noise.

5. Optical Characteristics

Item

Symbol

Condition

MIN.

TYP.

MAX.

UNIT

Note.

Φ=90 o

50

60

-

Viewing angle

Φ=270 o

50

60

-

(CR ≥ 10)

degree

Note 1,6

Φ=180 o

40

50

-

Φ=0 o

50

60

-

Φ=0 o

Contrast ratio

CR

300

500

-

-

Note 3

θ=0 o

T on

Φ=0 o

msec

Response Time

-

30

50

Note 4

T off

θ=0 o

msec

X

0.55

0.60

0.65

Red

Y

0.30

0.35

0.40

X

Backlight

0.27

0.32

0.37

Green

Y

is on

0.56

0.61

0.66

Chromaticlty

Φ=0 o

X

0.09

0.14

0.19

Note 1,5

Blue

θ=0 o

Y

0.05

0.09

0.15

X

0.26

0.29

0.32

White

Y

0.28

0.31

0.34

NTSC Ratio

S

45

65

-

%

Luminance

L

Φ=0 o

160

200

-

cd/m 2

Note 1,6

Luminance uniformity

U

θ=0 o

80

-

-

%

Note 1,6

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Note 1:

Note 2:

The data are measured after LEDs are turned on for 5 minutes.

The definition of viewing angle:

LCM displays full white. The brightness is the average value of 9 Refer to the graph below marked by θ and Ф

measured spots. Measurement equipment PR-705

Measuring condition:

- Measuring surroundings: Dark room

- Measuring temperature: Ta=25 ℃ .

- Adjust operating voltage to get optimum contrast at

the center of the display.

Note 3:

The definition of contrast ratio (Test LCM using PR-705):

Note 4:

Contrast

Luminance When LCD is at “White” state

Definition of Response time. (Test LCD using DMS501):

Ratio(CR)

=

Luminance When LCD is at “Black” state

The output signals of photo detector are measured

(Contrast Ratio is measured in optimum common electrode

when the input signals are changed from

voltage)

“black” to “white”(falling time)

and from “white” to “black”(rising time), respectively.

The response time is defined as

the time interval between the 10% and 90% of amplitudes.Refer to

figure as below.

Note 5:

Note 6:

Definition of Color of CIE1931 Coordinate and NTSC Ratio.

The luminance uniformity is calculated by using following formula.

△ Bp = Bp (Min.) / Bp (Max.)×100 (%)

Color gamut:

Bp (Max.) = Maximum brightness in 9 measured spots

Area of RGB triangle

S=

X100%

Bp (Min.) = Minimum brightness in 9 measured spots .

Area of NTSC triangle

Note 7:

Measured the luminance of white state at center point

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6. Design and Handling Precaution

Please refer to "LCD-Module-Design-Handling-Precaution.pdf".

7. Touch panel Design Precautions

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